Institution
Florida International University (FIU)
Abstract
Electromagnetics, which govern the fields of wireless communications, radar, and remote sensing, are fully described using four first-order PDEs known as Maxwell’s Equations. The finite-difference time-domain (FDTD) algorithm invented by Yee in 1966 operates on a discrete space-time staggered grid-pair for the electric and magnetic fields, and solutions are obtained via leapfrog update equations. The field of computational electromagnetics makes extensive use of the FDTD algorithm for modeling involving various types of antennas, microwave filters, circuits, aerospace vehicles, and wireless systems. For accurate and dispersion-less solution, the discretization of the spatial and temporal variables require a high degree of over-sampling that is much higher than what is demanded by the Nyquist Sampling Theorem, in order for the discrete domain update equations to represent the behavior of a continuous linear PDE system. The highly-oversampled nature of FDTD results in high computational complexity and therefore long execution times on high-performance computing systems. Hardware acceleration is a technique to accelerate the computation of FDTD using application-specific integrated digital processor arrays that are custom designed for implementing FDTD without using any software at all. The hard-wired parallel computation allows very good acceleration compared to state-of-art computing solutions based on high-performance compute servers, GPU realizations, and cloud computing techniques. The talk reports on a hardware accelerator that supports real-time operation on a Xilinx RF SoC device. Comparison with GPUs are provided (interim results show better than x100).
Hardware Accelerated Fast FDTD of Time Dependent Maxwell’s Equations on Xilinx RF SoC
Electromagnetics, which govern the fields of wireless communications, radar, and remote sensing, are fully described using four first-order PDEs known as Maxwell’s Equations. The finite-difference time-domain (FDTD) algorithm invented by Yee in 1966 operates on a discrete space-time staggered grid-pair for the electric and magnetic fields, and solutions are obtained via leapfrog update equations. The field of computational electromagnetics makes extensive use of the FDTD algorithm for modeling involving various types of antennas, microwave filters, circuits, aerospace vehicles, and wireless systems. For accurate and dispersion-less solution, the discretization of the spatial and temporal variables require a high degree of over-sampling that is much higher than what is demanded by the Nyquist Sampling Theorem, in order for the discrete domain update equations to represent the behavior of a continuous linear PDE system. The highly-oversampled nature of FDTD results in high computational complexity and therefore long execution times on high-performance computing systems. Hardware acceleration is a technique to accelerate the computation of FDTD using application-specific integrated digital processor arrays that are custom designed for implementing FDTD without using any software at all. The hard-wired parallel computation allows very good acceleration compared to state-of-art computing solutions based on high-performance compute servers, GPU realizations, and cloud computing techniques. The talk reports on a hardware accelerator that supports real-time operation on a Xilinx RF SoC device. Comparison with GPUs are provided (interim results show better than x100).
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